1995 Symposium on Low Power Electronics - Panel Discussion
			Monday, October 9, 1995, 8pm
			Fairmont Hotel, San Jose, CA
	What is the "right" supply voltage for low power systems?  

Organizer:				Moderator:
Jim Burr, Sun Microsystems		Tom Knight, MIT

Panelists:

Paul Solomon, IBM			Devices
Thomas Szepesi, Analog Devices		Power supplies
Paul Gray, UC Berkeley			Analog
Dan Dobberpuhl, DEC			Digital
Gwilym Luff, Motorola			Systems

Panel abstract:

Although lowering the supply voltage improves energy efficiency of
digital CMOS logic, raising the supply voltage improves energy
efficiency in analog designs, including voltage regulators. Also,
circuits which control mechanical work generally favor higher supply
voltages.  How can we reconcile these competing trends in the highly
integrated mixed-signal systems which tend to characterize low-power
applications?  One obvious solution is multiple supply voltages. But is
this cost-effective or energy efficient?
 
Even in digital systems, reducing the supply voltage degrades
performance, and makes the system more sensitive to process and supply
variations. What will limit the supply voltage in practice.  Will it
depend on application?

Come join experts from many different areas, power supply design,
fabrication, digital design, analog design, etc. in a discussion
of what they want the supply to be, and why.