Professor Umran S. Inan

Winter 1997-98

Date: Wednesday, February 4, 1998

Time: 4:15 PM Refreshments at 4:00

Location: Gesb 124 (Green Earth Sciences Bldg.)

Application of Plasmas to Patterning in VLSI Fabrication

Dr. Jim McVittie

Center for Intergrated Systmes

Stanford University


Plasmas are essential tools in the fabrication of VLSI chips. Over 30% of the processing steps involve plasmas. This talk will start with an overview of plasma process steps used in VLSI manufacturing. It will than focus on the plasma etching processes uses to transfer submicron photolithography patterns into silicon wafer surfaces. The two attributes of plasmas which are critical to this application are ion sheath acceleration and the generation of reactive molecular fragments. The fragments and reaction products both activate and protect surfaces depending on the ion bombardment which is controlled by shading effects and ion directionality. The net effect is that plasma etching processes can be varied from being isotropic to being anisotropic able to form structures down to the tens of nanometer range. Whereas the initial plasma reactors were mainly parallel plate configurations using capacitive coupling, recently the industry has moved to inductive coupled reactors which offer higher plasma densities at low plasma potentials and lower pressure operation. While the development of plasma processes and equipment is still strongly empirically driven because the strong chemical components, modeling and simulation are becoming common as the industry moves toward below 0.2 um and to 12 inch wafers. I will end with an overview of current modeling work with an emphasis on profile modeling. .