Publications

• Bevan M. Baas, "A Parallel Programmable Energy-Efficient Architecture For Computationally-Intensive DSP Systems," In Signals, Systems and Computers, 2003. Conference Record of the Thirty-Seventh Asilomar Conference on, November 2003.

• Howard CheHao Chang and Bevan M. Baas, "Mapping an FIR Filter to a 2-Dimensional Mesh of Processors," Technical Report ECE-CE-2003-1, Computer Engineering Research Laboratory, ECE Department, University of California, Davis, 2003.

• J. Thomson, B. Baas, E. Cooper, J. Gilbert, G. Hsieh, P. Husted, A. Lokanathan, J. Kuskin, D. McCracken, W. McFarland, T. Meng, D. Nakahira, S. Ng, M. Rattehalli, J. Smith, R. Subramanian, L. Thon, Y. Wang, R. Yu, X. Zhang, "An Integrated 802.11a Baseband and MAC Processor," International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 3-7 February 2002.
  • Paper, 3pages:     figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7 (sorry, will fix soon).
  • Slides, 21pages:  

• Bevan M. Baas, "An Approach to Low-Power, High-Performance, Fast Fourier Transform Processor Design," Ph.D. dissertation, Stanford University, Stanford, CA, February 1999.

• Bevan M. Baas, "A Low-Power, High-Performance, 1024-point FFT Processor." IEEE Journal of Solid-State Circuits (JSSC), pp. 380-387, March 1999.   

• Bevan M. Baas, "A 9.5mW, 330µsec, 1024-point FFT Processor," Proceedings of the 1998 Custom Integrated Circuits Conference (CICC), Santa Clara, CA, USA, 11-14 May 1998.
  • Paper, 4pgs:    
  • Slides, color, 24pgs:  
  • Slides, white background, 12pgs:  

• G. L. Tyler, B. Baas, F. Bauregger, S. Mitelman, I. Linscott, E. Post, O. Shana'a, and J. Twicken. "Radioscience Receiver Development for Low Power, Low Mass Uplink Missions." In JPL's Planetary Instrumentation Definition and Development Program Workshop, June 1997.

• Bevan M. Baas, "An Energy-Efficient Single-Chip FFT Processor," Proceedings of the 1996 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, 13-15 June 1996.
  • Paper, 2pgs, postscript: part1, 1.3MB, part2, 0.1MB, part3, 0.1MB.

• James B. Burr, Zongjian Chen, Bevan M. Baas; "Stanford Ultra-Low-Power CMOS Technology and Applications," in Low-power HF Microelectronics, a Unified Approach. London, UK: The Institution of Electrical Engineers, 1996.

• Bevan M. Baas, "An Energy-Efficient FFT Processor Architecture," StarLab Technical Report NGT-70340-1994-1, January 25, 1994. [16pgs, 1.7 MB postscript]

• Bevan M. Baas, "A Pipelined Memory System For an Interleaved Processor," StarLab Technical Report NSF-GF-1992-1, June 18, 1992.

Slides from talks coming....

• Bevan M. Baas, EE350 Seminar at Stanford University, "Algorithm, Architecture, and Circuits of an Energy-Efficient Single-Chip FFT Processor." November 29, 1995.

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